Course / Course Details

Moore s law in VLSI technology

  • Sasikala image

    By - Sasikala

  • 0 students
  • N/A
  • (0)

Course Description

This course introduces the concept of Moore’s Law and its impact on the evolution of VLSI (Very Large Scale Integration) technology. Students will learn how transistor scaling has transformed semiconductor devices, integrated circuits, and modern computing systems. The course covers CMOS scaling, fabrication technology, chip performance improvement, power consumption challenges, and future trends beyond Moore’s Law. Learners will gain foundational knowledge of semiconductor miniaturization and VLSI design advancements used in modern electronics.

Course Outcomes

After completing this course, learners will be able to:

  1. Understand the fundamentals of Moore’s Law and VLSI technology.
  2. Explain transistor scaling and semiconductor manufacturing trends.
  3. Analyze the impact of miniaturization on chip performance and power efficiency.
  4. Identify challenges in deep submicron and nanoscale VLSI design.
  5. Understand CMOS technology evolution and modern IC fabrication methods.
  6. Explore future technologies beyond Moore’s Law in semiconductor industries.

Course Curriculum

  • 1 chapters
  • 99 lectures
  • 0 quizzes
  • N/A total length
Toggle all chapters
1 Static Latches and registers VLSI Lec 98
11.36 Min

2 Mux based latches Master Slave VLSI Lec 99
12.27 Min

3 Master slave register Reduced clock load VLSI Lec 100
16.07 Min

4 Current sources and Sinks Wilson Current Mirror Circuit Part 2 3 VLSI Lec 72
16.42 Min

5 What is VLSI Introduction Design flow VLSI Lec 01
16.36 Min

6 Moore s law in VLSI IC evolution VLSI Lec 02
14.33 Min

7 MOS transistor Structure Modes of operation VLSI Lec 03
13.5 Min

8 MOS transistor Enhancement mode Characteristics VLSI Lec 04
16.43 Min

9 MOS transistor 6 Steps for fabrication VLSI Lec 05
19.32 Min

10 NMOS Transistor Fabrication steps VLSI Lec 06
14.42 Min

11 PMOS Transistor Fabrication steps VLSI Lec 07
14.19 Min

12 CMOS Transistor N Well fabrication VLSI Lec 08
28.12 Min

13 CMOS Transistor P Well fabrication VLSI Lec 09
16.28 Min

14 CMOS Transistor Twin tub process VLSI Lec 10
11.27 Min

15 nMOS Transistor Ids versus Vds derivation Part 1 2 VLSI Lec 11
19.04 Min

16 nMOS Transistor Ids versus Vds derivation Saturation Region Part 2 2 VLSI Lec 12
13.09 Min

17 MOS transistor Aspects of Threshold voltage VLSI Lec 13
13.19 Min

18 Trans conductance Output conductance VLSI Lec 14
11.36 Min

19 Pass transistor Figure of merit VLSI Lec 15
12.04 Min

20 nMOS inverter Characteristics VLSI Lec 16
19.1 Min

21 Pull ups Load Resistor NMOS PMOS VLSI Lec 17
17.23 Min

22 CMOS inverter Characteristics VLSI Lec 18
14.17 Min

23 nMOS inverter Pull up to pull down ratio VLSI Lec 19
15.04 Min

24 nMOS inverter Pull up to pull down ratio driven through Pass transistor VLSI Lec 20
22.25 Min

25 BiCMOS inverter Circuit Diagram BiPolar CMOS VLSI Lec 21
10.34 Min

26 CMOS and Bipolar technologies Differences VLSI Lec 22
10.24 Min

27 Latch up in CMOS circuits SCR VLSI Lec 23
12.13 Min

28 Stick diagrams MOS layers VLSI Lec 24
15.42 Min

29 CMOS realizations Inverter VLSI Lec 25
12.54 Min

30 Stick diagrams Rules to draw VLSI Lec 26
12.38 Min

31 CMOS inverter Stick diagram VLSI Lec 27
14.45 Min

32 CMOS NAND GATE Stick diagram VLSI Lec 28
12.25 Min

33 CMOS NOR GATE Stick diagram VLSI Lec 29
12.5 Min

34 CMOS logic functions Stick diagram VLSI Lec 30
12.43 Min

35 MOS Layout layers Color Coding Representation VLSI Lec 31
15.5 Min

36 Mask layout Lambda based design rules VLSI Lec 32
12.25 Min

37 CMOS inverter Layout diagram VLSI Lec 33
12.35 Min

38 CMOS 2 input NAND and NOR gates Layout diagram VLSI Lec 34
11.34 Min

39 CMOS logic functions Layout diagram VLSI Lec 35
13.35 Min

40 MOS layers Sheet resistance concept VLSI Lec 36
17.08 Min

41 MOS transistors Inverters Sheet Resistance VLSI Lec 37
15.15 Min

42 CMOS Inverter Sheet Resistance VLSI Lec 38
11.24 Min

43 MOS circuits Area capacitance Standard unit of capacitance VLSI Lec 39
16.44 Min

44 MOS Circuits Area capacitance calculations VLSI Lec 40
12.05 Min

45 MOS Transistor Delay time VLSI Lec 41
12.4 Min

46 Inverter delays nMOS Calculation VLSI Lec 42
15.07 Min

47 CMOS Inverter Delay Real time Fall time Estimation VLSI Lec 43
16.11 Min

48 Cascaded Pass Transistor Long poly silicon wires Propagation delay VLSI Lec 44
14.36 Min

49 Wiring Capacitance Fringing Field Inter layer Peripheral VLSI Lec 45
14.42 Min

50 Choice of layers MOS circuits VLSI Lec 46
12.4 Min

51 Scaling models Scaling factors Part 1 2 VLSI Lec 47
17.3 Min

52 Scaling Factors Device Parameters Part 2 2 VLSI Lec 48
23.03 Min

53 Limitations on scaling Substrate Doping Part 1 VLSI Lec 49
18.13 Min

54 Limitations on scaling Miniaturization Interconnect Contact Resistance Part 2 VLSI Lec 50
16.32 Min

55 Limits on Logic levels and current density VLSI Lec 52
14.56 Min

56 Switch logic Pass Transistor Transmission Gate VLSI Lec 53
14.23 Min

57 Gate logic nMOS CMOS BiCMOS VLSI Lec 54
12.37 Min

58 Pseudo nMOS logic CMOS Logic VLSI Lec 55
15.38 Min

59 Dynamic CMOS logic 1 Forms of CMOS Logic VLSI Lec 56
12.44 Min

60 Dynamic CMOS logic 2 Forms of CMOS Logic VLSI Lec 57
12.45 Min

61 Cascaded inverters Driving large capacitance Part 1 3 VLSI Lec 58
18.16 Min

62 Super Buffers Driving large capacitance Part 2 3 VLSI Lec 59
15.45 Min

63 BiCMOS Drivers Driving large capacitance Part 3 3 VLSI Lec 60
12.49 Min

64 MOS transistors Characteristics Regions of Operations VLSI Lec 61
10.32 Min

65 MOS Transistor Common source stage with resistive load VLSI Lec 62
14.15 Min

66 Common source stage with diode connected load MOS Transistor VLSI Lec 63
14.07 Min

67 Common source amplifier without source resistor MOS Transistor VLSI Lec 64
14.17 Min

68 MOS Transistor Common source amplifier with source resistor VLSI Lec 65
11.16 Min

69 Common drain amplifier MOS transistor VLSI Lec 66
13.5 Min

70 Common gate amplifier MOS transistor VLSI Lec 67
12.2 Min

71 MOS device models Layout Capacitance Part 1 2 VLSI Lec 68
15.09 Min

72 MOS device models Small signal Spice Part 2 2 VLSI Lec 69
18.25 Min

73 Body bias effect MOS transistor VLSI Lec 70
17.09 Min

74 Current sources and Sinks Characteristics Part 1 3 VLSI Lec 71
16.19 Min

75 Current sources and Sinks Cascode Current mirror Part 3 3 VLSI Lec 73
15.08 Min

76 FPGA design flow Block Diagram VLSI Lec 74
23.34 Min

77 FPGA Architecture Configurable Logic Block CLB Part 1 2 VLSI Lec 75
16.25 Min

78 FPGA Architecture Switch Matrix Part 2 2 VLSI Lec 76
15.58 Min

79 SRAM technology FPGA technologies VLSI Lec 77
19.02 Min

80 Antifuse technology FPGA technologies VLSI Lec 78
14.09 Min

81 EPROM technology EEPROM FPGA technologies VLSI Lec 79
11.11 Min

82 FPGA families Introduction Altera flex 8000 Part 1 3 VLSI Lec 80
17.15 Min

83 FPGA families XILINX XC4000 XLINX SPARTAN II Part 2 3 VLSI Lec 81
19.52 Min

84 FPGA families XILINX VIRTEX Part 3 3 VLSI Lec 82
11.32 Min

85 Giga scale dilemma IC evaluation VLSI Lec 83
13.25 Min

86 Short channel effects DIBL Source Scattering Part 1 2 VLSI Lec 84
13.28 Min

87 Short channel effects Velocity Saturation Impact Ionization Part 2 2 VLSI Lec 85
15.14 Min

88 High K dielectric SIO2 VLSI Lec 86
11.18 Min

89 FinFET technology SG IG Part1 VLSI Lec 87
15 Min

90 FinFET technology Fabrication Characteristics Part2 VLSI Lec 88
14.51 Min

91 CMOS Combinational Sequential logic circuit VLSI Lec 89
17.53 Min

92 Static CMOS design Complemetary CMOS design VLSI Lec 90
15.22 Min

93 Complementary CMOS circuits Propagation delay VLSI Lec 91
16.53 Min

94 Ratioed logic in CMOS Pseudo NMOS DCVSL VLSI Lec 92
17.51 Min

95 Pass transistor logic Static CMOS circuit design VLSI Lec 93
12.58 Min

96 Dynamic CMOS design Basic Principle VLSI Lec 94
13.24 Min

97 Dynamic CMOS design Issues VLSI Lec 95
19.17 Min

98 Domino Logic np CMOS Cascading dynamic gates VLSI Lec 96
16.25 Min

99 Sequential logic Wave Forms VLSI Lec 97
12.39 Min

Instructor

Sasikala

0 Rating
0 Reviews
0 Students
85 Courses

Course Full Rating

0

Course Rating
(0)
(0)
(0)
(0)
(0)

No Review found

Sign In or Sign Up as student to post a review

Student Feedback

You must be enrolled to ask a question

Enrol

  • Duration N/A

  • Lectures 99 lessons

  • Enrolled 0 students

  • Category: Engineering

  • 0 Quizzes

  • Language: English

  • Skill Level Beginner

  • Certificate of Completion

  • Full lifetime access

Remove Coupon
Coupon Applied!

Shopping Cart

Loading...